Information

Section Number Title Page
3.7 Analog...........................................................................................................................................................................109
3.7.1 16-bit SAR ADC with PGA Configuration.................................................................................................109
3.7.2 CMP Configuration......................................................................................................................................116
3.7.3 12-bit DAC Configuration...........................................................................................................................118
3.7.4 VREF Configuration....................................................................................................................................119
3.8 Timers...........................................................................................................................................................................120
3.8.1 PDB Configuration......................................................................................................................................120
3.8.2 FlexTimer Configuration.............................................................................................................................123
3.8.3 PIT Configuration........................................................................................................................................127
3.8.4 Low-power timer configuration...................................................................................................................128
3.8.5 CMT Configuration......................................................................................................................................130
3.8.6 RTC configuration.......................................................................................................................................131
3.9 Communication interfaces............................................................................................................................................132
3.9.1 CAN Configuration......................................................................................................................................132
3.9.2 SPI configuration.........................................................................................................................................134
3.9.3 I2C Configuration........................................................................................................................................137
3.9.4 UART Configuration...................................................................................................................................138
3.9.5 SDHC Configuration....................................................................................................................................141
3.9.6 I2S configuration..........................................................................................................................................142
3.10 Human-machine interfaces (HMI)................................................................................................................................144
3.10.1 GPIO configuration......................................................................................................................................144
3.10.2 TSI Configuration........................................................................................................................................145
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................149
4.2 System memory map.....................................................................................................................................................149
4.2.1 Aliased bit-band regions..............................................................................................................................150
4.3 Flash Memory Map.......................................................................................................................................................151
4.3.1 Alternate Non-Volatile IRC User Trim Description....................................................................................152
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
6 Freescale Semiconductor, Inc.