Information

FTFL memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4002_0010 Program Flash Protection Registers (FTFL_FPROT3) 8 R/W Undefined
28.34.6/
622
4002_0011 Program Flash Protection Registers (FTFL_FPROT2) 8 R/W Undefined
28.34.6/
622
4002_0012 Program Flash Protection Registers (FTFL_FPROT1) 8 R/W Undefined
28.34.6/
622
4002_0013 Program Flash Protection Registers (FTFL_FPROT0) 8 R/W Undefined
28.34.6/
622
4002_0016 EEPROM Protection Register (FTFL_FEPROT) 8 R/W Undefined
28.34.7/
623
4002_0017 Data Flash Protection Register (FTFL_FDPROT) 8 R/W Undefined
28.34.8/
625
28.34.1 Flash Status Register (FTFL_FSTAT)
The FSTAT register reports the operational status of the FTFL module.
The CCIF, RDCOLERR, ACCERR, and FPVIOL bits are readable and writable. The
MGSTAT0 bit is read only. The unassigned bits read 0 and are not writable.
NOTE
When set, the Access Error (ACCERR) and Flash Protection
Violation (FPVIOL) bits in this register prevent the launch of
any more commands until the flag is cleared (by writing a one
to it).
Address: FTFL_FSTAT is 4002_0000h base + 0h offset = 4002_0000h
Bit 7 6 5 4 3 2 1 0
Read CCIF
RDCOLERR
ACCERR FPVIOL 0 MGSTAT0
Write w1c
w1c
w1c w1c
Reset
0 0 0 0 0 0 0 0
FTFL_FSTAT field descriptions
Field Description
7
CCIF
Command Complete Interrupt Flag
The CCIF flag indicates that a FTFL command or EEPROM file system operation has completed. The
CCIF flag is cleared by writing a 1 to CCIF to launch a command, and CCIF stays low until command
completion or command violation. The CCIF flag is also cleared by a successful write to FlexRAM while
enabled for EEE, and CCIF stays low until the EEPROM file system has created the associated EEPROM
data record.
Table continues on the next page...
Chapter 28 Flash Memory Module (FTFL)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 615