Information

FB memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_C040 Chip select mask register (FB_CSMR5) 32 R/W 0000_0000h
29.3.2/
685
4000_C044 Chip select control register (FB_CSCR5) 32 R/W 0000_0000h
29.3.3/
686
4000_C060 Chip select port multiplexing control register (FB_CSPMCR) 32 R/W 0000_0000h
29.3.4/
689
29.3.1 Chip select address register (FB_CSARn)
The CSARn registers specify the chip-select base addresses.
NOTE
Because the FlexBus module is one of the slaves connected to
the crossbar switch, it is only accessible within a certain
memory range. Refer to the device memory map for the
applicable FlexBus "expansion" address range for which the
chip-selects can be active. Set the CSARn registers
appropriately.
Addresses: FB_CSAR0 is 4000_C000h base + 0h offset = 4000_C000h
FB_CSAR1 is 4000_C000h base + Ch offset = 4000_C00Ch
FB_CSAR2 is 4000_C000h base + 18h offset = 4000_C018h
FB_CSAR3 is 4000_C000h base + 24h offset = 4000_C024h
FB_CSAR4 is 4000_C000h base + 30h offset = 4000_C030h
FB_CSAR5 is 4000_C000h base + 3Ch offset = 4000_C03Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
BA
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FB_CSARn field descriptions
Field Description
31–16
BA
Base address
Defines the base address for memory dedicated to chip-select FB_CSn. BA is compared to bits 31–16 on
the internal address bus to determine if chip-select memory is being accessed.
15–0
Reserved
This read-only field is reserved and always has the value zero.
Memory Map/Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
684 Freescale Semiconductor, Inc.