Information

Table 3-4. Interrupt vector assignments (continued)
Address Vector IRQ
1
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module Source description
0x0000_00C4 49 33 1 8 CAN0 Receive Warning
0x0000_00C8 50 34 1 8 CAN0 Wake Up
0x0000_00CC 51 35 1 8 — —
0x0000_00D0 52 36 1 9 — —
0x0000_00D4 53 37 1 9 CAN1 OR'ed Message buffer (0-15)
0x0000_00D8 54 38 1 9 CAN1 Bus off
0x0000_00DC 55 39 1 9 CAN1 Error
0x0000_00E0 56 40 1 10 CAN1 Transmit Warning
0x0000_00E4 57 41 1 10 CAN1 Receive Warning
0x0000_00E8 58 42 1 10 CAN1 Wake Up
0x0000_00EC 59 43 1 10 — —
0x0000_00F0 60 44 1 11 — —
0x0000_00F4 61 45 1 11 UART0 Single interrupt vector for UART status
sources
0x0000_00F8 62 46 1 11 UART0 Single interrupt vector for UART error
sources
0x0000_00FC 63 47 1 11 UART1 Single interrupt vector for UART status
sources
0x0000_0100 64 48 1 12 UART1 Single interrupt vector for UART error
sources
0x0000_0104 65 49 1 12 UART2 Single interrupt vector for UART status
sources
0x0000_0108 66 50 1 12 UART2 Single interrupt vector for UART error
sources
0x0000_010C 67 51 1 12 UART3 Single interrupt vector for UART status
sources
0x0000_0110 68 52 1 13 UART3 Single interrupt vector for UART error
sources
0x0000_0114 69 53 1 13 UART4 Single interrupt vector for UART status
sources
0x0000_0118 70 54 1 13 UART4 Single interrupt vector for UART error
sources
0x0000_011C 71 55 1 13 UART5 Single interrupt vector for UART status
sources
0x0000_0120 72 56 1 14 UART5 Single interrupt vector for UART error
sources
0x0000_0124 73 57 1 14 ADC0 —
Table continues on the next page...
Chapter 3 Chip Configuration
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 69