Address
Address
Data
TSIZ
AA=1
AA=0
AA=1
AA=0
FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB_ALE
FB_CSn
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
Figure 29-40. Read-Bus Cycle with Two-Clock Address Setup (No Wait States)
Functional Description
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
710 Freescale Semiconductor, Inc.
