Information

30.2.2 EzPort Chip Select (EZP_CS)
Chip select for signalling the start and end of serial transfers. If EZP_CS is asserted
during and when the micro-controller's reset out signal is negated, then EzPort is enabled
out of reset; otherwise it is disabled. After EzPort is enabled, asserting EZP_CS
commences a serial data transfer, which continues until EZP_CS is negated again. The
negation of EZP_CS indicates the current command is finished and resets the EzPort state
machine so that it is ready to receive the next command.
30.2.3 EzPort Serial Data In (EZP_D)
Serial data in for data transfers. EZP_D is registered on the rising edge of EZP_CK. All
commands, addresses, and data are shifted in most significant bit first. When the EzPort
is driving output data on EZP_Q, the data shifted in EZP_D is ignored.
30.2.4 EzPort Serial Data Out (EZP_Q)
Serial data out for data transfers. EZP_Q is driven on the falling edge of EZP_CK. It is
tri-stated unless EZP_CS is asserted and the EzPort is driving data out. All data is shifted
out most significant bit first.
30.3 Command Definition
The EzPort receives commands from an external device and translates those commands
into flash memory accesses. The following table lists the supported commands.
Table 30-2. EzPort Commands
Command Description Code
Address
Bytes
Data Bytes
Accepted when
secure?
WREN Write Enable 0x06 0 0 Yes
WRDI Write Disable 0x04 0 0 Yes
RDSR Read Status Register 0x05 0 1 Yes
READ Flash Read Data 0x03 3
1
1+ No
FAST_READ Flash Read Data at High Speed 0x0B 3
1
1+
2
No
SP Flash Section Program 0x02 3
3
8 - SECTION
4
No
SE Flash Sector Erase 0xD8 3
3
0 No
BE Flash Bulk Erase 0xC7 0 0 Yes
5
Table continues on the next page...
Command Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
728 Freescale Semiconductor, Inc.