Information

supply pins. In these cases, there are separate pads for the analog supplies bonded to the
same pin as the corresponding digital supply so that some degree of isolation between the
supplies is maintained.
When available on a separate pin, both V
DDA
and V
SSA
must be connected to the same
voltage potential as their corresponding MCU digital supply (V
DD
and V
SS
) and must be
routed carefully for maximum noise immunity and bypass capacitors placed as near as
possible to the package.
If separate power supplies are used for analog and digital power, the ground connection
between these supplies must be at the V
SSA
pin. This should be the only ground
connection between these supplies if possible. The V
SSA
pin makes a good single point
ground location.
32.6.1.2 Analog voltage reference pins
In addition to the analog supplies, the ADC module has connections for two reference
voltage inputs used by the converter, V
REFSH
and V
REFSL
. V
REFSH
is the high reference
voltage for the converter. V
REFSL
is the low reference voltage for the converter.
The ADC can be configured to accept one of two voltage reference pairs for V
REFSH
and
V
REFSL
. Each pair contains a positive reference and a ground reference. The two pairs are
external (V
REFH
and V
REFL
) and alternate (V
ALTH
and V
ALTL
). These voltage references
are selected using the REFSEL bits in the SC2 register. The alternate (V
ALTH
and V
ALTL
)
voltage reference pair may select additional external pins or internal sources depending
on MCU configuration. Refer to the Chip Configuration information on the Voltage
References specific to this MCU.
In some packages, the external or alternate pairs are connected in the package to V
DDA
and V
SSA
, respectively. One of these positive references may be shared on the same pin
as V
DDA
on some devices. One of these ground references may be shared on the same pin
as V
SSA
on some devices.
If externally available, the positive reference may be connected to the same potential as
V
DDA
or may be driven by an external source to a level between the minimum Ref
Voltage High and the V
DDA
potential (the positive reference must never exceed V
DDA
). If
externally available, the ground reference must be connected to the same voltage
potential as V
SSA
. The voltage reference pairs must be routed carefully for maximum
noise immunity and bypass capacitors placed as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array
at each successive approximation step is drawn through the V
REFH
and V
REFL
loop. The
best external component to meet this current demand is a 0.1 μF capacitor with good high
Application information
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
796 Freescale Semiconductor, Inc.