Information

SC = Number of ADCK cycles used during sample window
CADIN = Internal ADC input capacitance
NUMTAU = -ln(LSBERR / 2
N
)
LSBERR = value of acceptable sampling error in LSBs
N = 8 in 8-bit mode, 10 in 10-bit mode, 12 in 12-bit mode or 16 in 16-bit mode
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP
and changing the ADLSTS bits (to increase the sample window) or decreasing ADCK
frequency to increase sample time.
32.6.2.2 Pin leakage error
Leakage on the I/O pins can cause conversion error if the external analog source
resistance (R
AS
) is high. If this error cannot be tolerated by the application, keep R
AS
lower than V
REFH
/ (4 × I
LEAK
× 2
N
) for less than 1/4 LSB leakage error (N = 8 in 8-bit
mode, 10 in 10-bit mode, 12 in 12-bit mode, or 16 in 16-bit mode).
32.6.2.3 Noise-induced errors
System noise that occurs during the sample or conversion process can affect the accuracy
of the conversion. The ADC accuracy numbers are guaranteed as specified only if the
following conditions are met:
• There is a 0.1 μF low-ESR capacitor from V
REFH
to V
REFL
.
• There is a 0.1 μF low-ESR capacitor from V
DDA
to V
SSA
.
• If inductive isolation is used from the primary supply, an additional 1 μF capacitor is
placed from V
DDA
to V
SSA
.
• V
SSA
(and V
REFL
, if connected) is connected to V
SS
at a quiet point in the ground
plane.
• Operate the MCU in Wait or Normal Stop mode before initiating (hardware triggered
conversions) or immediately after initiating (hardware or software triggered
conversions) the ADC conversion.
Application information
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
798 Freescale Semiconductor, Inc.