Information

DAC memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
400C_C014 DAC Data Low Register (DAC0_DAT10L) 8 R/W 00h
34.4.1/
838
400C_C015 DAC Data High Register (DAC0_DAT10H) 8 R/W 00h
34.4.2/
839
400C_C016 DAC Data Low Register (DAC0_DAT11L) 8 R/W 00h
34.4.1/
838
400C_C017 DAC Data High Register (DAC0_DAT11H) 8 R/W 00h
34.4.2/
839
400C_C018 DAC Data Low Register (DAC0_DAT12L) 8 R/W 00h
34.4.1/
838
400C_C019 DAC Data High Register (DAC0_DAT12H) 8 R/W 00h
34.4.2/
839
400C_C01A DAC Data Low Register (DAC0_DAT13L) 8 R/W 00h
34.4.1/
838
400C_C01B DAC Data High Register (DAC0_DAT13H) 8 R/W 00h
34.4.2/
839
400C_C01C DAC Data Low Register (DAC0_DAT14L) 8 R/W 00h
34.4.1/
838
400C_C01D DAC Data High Register (DAC0_DAT14H) 8 R/W 00h
34.4.2/
839
400C_C01E DAC Data Low Register (DAC0_DAT15L) 8 R/W 00h
34.4.1/
838
400C_C01F DAC Data High Register (DAC0_DAT15H) 8 R/W 00h
34.4.2/
839
400C_C020 DAC Status Register (DAC0_SR) 8 R 02h
34.4.3/
839
400C_C021 DAC Control Register (DAC0_C0) 8 R/W 00h
34.4.4/
840
400C_C022 DAC Control Register 1 (DAC0_C1) 8 R/W 00h
34.4.5/
841
400C_C023 DAC Control Register 2 (DAC0_C2) 8 R/W 0Fh
34.4.6/
842
400C_D000 DAC Data Low Register (DAC1_DAT0L) 8 R/W 00h
34.4.1/
838
400C_D001 DAC Data High Register (DAC1_DAT0H) 8 R/W 00h
34.4.2/
839
400C_D002 DAC Data Low Register (DAC1_DAT1L) 8 R/W 00h
34.4.1/
838
400C_D003 DAC Data High Register (DAC1_DAT1H) 8 R/W 00h
34.4.2/
839
Table continues on the next page...
Memory Map/Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
836 Freescale Semiconductor, Inc.