Information

VREF memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_4000 VREF Trim Register (VREF_TRM) 8 R/W Undefined
35.2.1/
850
4007_4001 VREF Status and Control Register (VREF_SC) 8 R/W 00h
35.2.2/
851
35.2.1 VREF Trim Register (VREF_TRM)
This register contains bits that contain the trim data for the Voltage Reference.
Address: VREF_TRM is 4007_4000h base + 0h offset = 4007_4000h
Bit 7 6 5 4 3 2 1 0
Read
Reserved
0
TRIM
Write
Reset
x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
VREF_TRM field descriptions
Field Description
7
Reserved
This field is reserved.
Upon reset this value is loaded with a factory trim value.
This bit must always be written with the original reset value.
6
Reserved
This read-only field is reserved and always has the value zero.
5–0
TRIM
Trim bits
Upon reset this value is loaded with a factory trim value.
These bits change the resulting VREF by approximately ± 0.5 mV for each step.
NOTE: Min = minimum and max = maximum voltage reference output. For minimum and maximum
voltage reference output values, refer to the Data Sheet for this chip.
000000 Min
.... ....
111111 Max
Memory Map and Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
850 Freescale Semiconductor, Inc.