Information

3.3.11 External Watchdog Monitor (EWM) Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
External Watchdog
Monitor (EWM)
Peripheral
bridge 0
Register
access
Signal multiplexing
Module signals
Figure 3-15. External Watchdog Monitor configuration
Table 3-26. Reference links to related information
Topic Related module Reference
Full description External Watchdog
Monitor (EWM)
EWM
System memory map System memory map
Clocking Clock distribution
Power management Power management
Signal multiplexing Port Control Module Signal multiplexing
3.3.11.1 EWM clocks
This table shows the EWM clocks and the corresponding chip clocks.
Table 3-27. EWM clock connections
Module clock Chip clock
Low Power Clock 1 kHz LPO Clock
3.3.11.2 EWM low-power modes
This table shows the EWM low-power modes and the corresponding chip low-power
modes.
Chapter 3 Chip Configuration
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 89