Information

Table 37-68. Dual Edge Capture Mode — Edge Polarity Selection
ELSnB ELSnA Channel Port Enable Detected Edges
0 0 Disabled No edge
0 1 Enabled Rising edge
1 0 Enabled Falling edge
1 1 Enabled Rising and falling edges
Addresses: FTM0_C0SC is 4003_8000h base + Ch offset = 4003_800Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 CHF
CHIE
MSB
MSA
ELSB ELSA
0
DMA
W
0
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_CnSC field descriptions
Field Description
31–8
Reserved
This read-only field is reserved and always has the value zero.
7
CHF
Channel Flag
Set by hardware when an event occurs on the channel. CHF is cleared by reading the CSC register while
CHnF is set and then writing a 0 to the CHF bit. Writing a 1 to CHF has no effect.
If another event occurs between the read and write operations, the write operation has no effect;
therefore, CHF remains set indicating an event has occurred. In this case a CHF interrupt request is not
lost due to the clearing sequence for a previous CHF.
0 No channel event has occurred.
1 A channel event has occurred.
6
CHIE
Channel Interrupt Enable
Enables channel interrupts.
0 Disable channel interrupts. Use software polling.
1 Enable channel interrupts.
5
MSB
Channel Mode Select
Used for further selections in the channel logic. Its functionality is dependent on the channel mode. See
Table 37-7.
Table continues on the next page...
Chapter 37 FlexTimer (FTM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 895