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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller MAPBGA 144 (13x13) 32-Bit 100 MHz I/O number 104

Section Number Title Page

Chapter 9

Debug

9.1 Introduction...................................................................................................................................................................199

9.1.1 References....................................................................................................................................................201

9.2 The Debug Port.............................................................................................................................................................201

9.2.1 JTAG-to-SWD change sequence.................................................................................................................202

9.2.2 JTAG-to-cJTAG change sequence...............................................................................................................202

9.3 Debug Port Pin Descriptions.........................................................................................................................................203

9.4 System TAP connection................................................................................................................................................203

9.4.1 IR Codes.......................................................................................................................................................203

9.5 JTAG status and control registers.................................................................................................................................204

9.5.1 MDM-AP Control Register..........................................................................................................................205

9.5.2 MDM-AP Status Register............................................................................................................................207

9.6 Debug Resets................................................................................................................................................................208

9.7 AHB-AP........................................................................................................................................................................209

9.8 ITM...............................................................................................................................................................................210

9.9 Core Trace Connectivity...............................................................................................................................................210

9.10 Embedded Trace Macrocell v3.5 (ETM)......................................................................................................................210

9.11 Coresight Embedded Trace Buffer (ETB)....................................................................................................................211

9.11.1 Performance Profiling with the ETB...........................................................................................................211

9.11.2 ETB Counter Control...................................................................................................................................212

9.12 TPIU..............................................................................................................................................................................212

9.13 DWT.............................................................................................................................................................................212

9.14 Debug in Low Power Modes........................................................................................................................................213

9.14.1 Debug Module State in Low Power Modes.................................................................................................214

9.15 Debug & Security.........................................................................................................................................................214

Chapter 10

Signal Multiplexing and Signal Descriptions

10.1 Introduction...................................................................................................................................................................215

K10 Sub-Family Reference Manual, Rev. 6, Nov 2011

Freescale Semiconductor, Inc. 9