Information

FTMx_EXTTRIG field descriptions (continued)
Field Description
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
2
CH4TRIG
Channel 4 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
1
CH3TRIG
Channel 3 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
0
CH2TRIG
Channel 2 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
37.3.17 Channels Polarity (FTMx_POL)
This register defines the output polarity of the FTM channels.
NOTE
The safe value that is driven in a channel output when the fault
control is enabled and a fault condition is detected is the
inactive state of the channel. That is, the safe value of a channel
is the value of its POL bit.
Addresses: FTM0_POL is 4003_8000h base + 70h offset = 4003_8070h
FTM1_POL is 4003_9000h base + 70h offset = 4003_9070h
FTM2_POL is 400B_8000h base + 70h offset = 400B_8070h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved
POL7 POL6 POL5 POL4 POL3 POL2 POL1 POL0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 37 FlexTimer (FTM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 915