Information

FTMx_QDCTRL field descriptions (continued)
Field Description
0 Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of
this signal.
1 Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this
signal.
4
PHBPOL
Phase B Input Polarity
Selects the polarity for the quadrature decoder phase B input.
0 Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of
this signal.
1 Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this
signal.
3
QUADMODE
Quadrature Decoder Mode
Selects the encoding mode used in the quadrature decoder mode.
0 Phase A and phase B encoding mode.
1 Count and direction encoding mode.
2
QUADIR
FTM Counter Direction in Quadrature Decoder Mode
Indicates the counting direction.
0 Counting direction is decreasing (FTM counter decrement).
1 Counting direction is increasing (FTM counter increment).
1
TOFDIR
Timer Overflow Direction in Quadrature Decoder Mode
Indicates if the TOF bit was set on the top or the bottom of counting.
0 TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter
changes from its minimum value (CNTIN register) to its maximum value (MOD register).
1 TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter
changes from its maximum value (MOD register) to its minimum value (CNTIN register).
0
QUADEN
Quadrature Decoder Mode Enable
Enables the quadrature decoder mode. In this mode, the phase A and B input signals control the FTM
counter direction. The quadrature decoder mode has precedence over the other modes. (See Table
37-7.)
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Quadrature decoder mode is disabled.
1 Quadrature decoder mode is enabled.
Memory Map and Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
924 Freescale Semiconductor, Inc.