Information

FTMx_PWMLOAD field descriptions
Field Description
31–10
Reserved
This read-only field is reserved and always has the value zero.
9
LDOK
Load Enable
Enables the loading of the MOD, CNTIN, and CV registers with the values of their write buffers.
0 Loading updated values is disabled.
1 Loading updated values is enabled.
8
Reserved
This read-only field is reserved and always has the value zero.
7
CH7SEL
Channel 7 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
6
CH6SEL
Channel 6 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
5
CH5SEL
Channel 5 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
4
CH4SEL
Channel 4 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
3
CH3SEL
Channel 3 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
2
CH2SEL
Channel 2 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
1
CH1SEL
Channel 1 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
0
CH0SEL
Channel 0 Select
0 Do not include the channel in the matching process.
1 Include the channel in the matching process.
Memory Map and Register Definition
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
934 Freescale Semiconductor, Inc.