Information

channel (n+1) match
FTM counter
channel (n) match
channel (n) output
after the software
output control
channel (n+1) output
after the software
output control
CH(n)OC buffer
CH(n+1)OC buffer
CH(n)OC bit
CH(n+1)OC bit
NOTE
CH(n)OCV = 1 and CH(n+1)OCV = 0.
SWOCTRL register synchronization
SWOCTRL register synchronization
write to SWOCTRL register write to SWOCTRL register
Figure 37-227. Example of Software Output Control in Combine and Complementary
Mode
Software output control forces the following values on channels (n) and (n+1) when the
COMP bit is zero.
Table 37-242. Software Ouput Control Behavior when (COMP = 0)
CH(n)OC CH(n+1)OC CH(n)OCV CH(n+1)OCV Channel (n) Output Channel (n+1) Output
0 0 X X is not modified by SWOC is not modified by SWOC
1 1 0 0 is forced to zero is forced to zero
1 1 0 1 is forced to zero is forced to one
1 1 1 0 is forced to one is forced to zero
1 1 1 1 is forced to one is forced to one
Software output control forces the following values on channels (n) and (n+1) when the
COMP bit is one.
Table 37-243. Software Ouput Control Behavior when (COMP = 1)
CH(n)OC CH(n+1)OC CH(n)OCV CH(n+1)OCV Channel (n) Output Channel (n+1) Output
0 0 X X is not modified by SWOC is not modified by SWOC
1 1 0 0 is forced to zero is forced to zero
1 1 0 1 is forced to zero is forced to one
1 1 1 0 is forced to one is forced to zero
1 1 1 1 is forced to one is forced to zero
Chapter 37 FlexTimer (FTM)
K10 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 977