Information

Note

It is expected that the polarity control be used only in combine

mode.

37.4.18 Initialization

The initialization forces the CHnOI bit value to the channel (n) output when a one is

written to the INIT bit.

The initialization depends on COMP and DTEN bits. The following table shows the

values that channels (n) and (n+1) are forced by initialization when the COMP and

DTEN bits are zero.

Table 37-245. Initialization Behavior when (COMP = 0 and DTEN = 0)

CH(n)OI CH(n+1)OI Channel (n) Output Channel (n+1) Output

0 0 is forced to zero is forced to zero

0 1 is forced to zero is forced to one

1 0 is forced to one is forced to zero

1 1 is forced to one is forced to one

The following table shows the values that channels (n) and (n+1) are forced by

initialization when (COMP = 1) or (DTEN = 1).

Table 37-246. Initialization Behavior when (COMP = 1 or DTEN = 1)

CH(n)OI CH(n+1)OI Channel (n) Output Channel (n+1) Output

0 X is forced to zero is forced to one

1 X is forced to one is forced to zero

Note

It is expected that the initialization feature be used only in

combine mode and with disabled FTM counter (see the

description of the CLKS field in the Status and Control

37.4.19 Features Priority

The following figure shows the priority of the features used at the generation of channels

(n) and (n+1) outputs signals.

Functional Description

K10 Sub-Family Reference Manual, Rev. 6, Nov 2011

986 Freescale Semiconductor, Inc.