Information

121
MAP
BGA
100
LQFP
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
E9 63 PTB17 TSI0_CH10 TSI0_CH10 PTB17 SPI1_SIN UART0_TX FB_AD16 EWM_OUT_b
D9 64 PTB18 TSI0_CH11 TSI0_CH11 PTB18 CAN0_TX FTM2_CH0 I2S0_TX_
BCLK
FB_AD15 FTM2_QD_
PHA
C9 65 PTB19 TSI0_CH12 TSI0_CH12 PTB19 CAN0_RX FTM2_CH1 I2S0_TX_FS FB_OE_b FTM2_QD_
PHB
F10 66 PTB20 DISABLED PTB20 FB_AD31 CMP0_OUT
F9 67 PTB21 DISABLED PTB21 FB_AD30 CMP1_OUT
F8 68 PTB22 DISABLED PTB22 FB_AD29 CMP2_OUT
E8 69 PTB23 DISABLED PTB23 SPI0_PCS5 FB_AD28
B9 70 PTC0 ADC0_SE14/
TSI0_CH13
ADC0_SE14/
TSI0_CH13
PTC0 SPI0_PCS4 PDB0_EXTRG FB_AD14 I2S0_TXD1
D8 71 PTC1/
LLWU_P6
ADC0_SE15/
TSI0_CH14
ADC0_SE15/
TSI0_CH14
PTC1/
LLWU_P6
SPI0_PCS3 UART1_RTS_
b
FTM0_CH0 FB_AD13 I2S0_TXD0
C8 72 PTC2 ADC0_SE4b/
CMP1_IN0/
TSI0_CH15
ADC0_SE4b/
CMP1_IN0/
TSI0_CH15
PTC2 SPI0_PCS2 UART1_CTS_
b
FTM0_CH1 FB_AD12 I2S0_TX_FS
B8 73 PTC3/
LLWU_P7
CMP1_IN1 CMP1_IN1 PTC3/
LLWU_P7
SPI0_PCS1 UART1_RX FTM0_CH2 CLKOUT I2S0_TX_
BCLK
— 74 VSS VSS VSS
— 75 VDD VDD VDD
A8 76 PTC4/
LLWU_P8
DISABLED PTC4/
LLWU_P8
SPI0_PCS0 UART1_TX FTM0_CH3 FB_AD11 CMP1_OUT
D7 77 PTC5/
LLWU_P9
DISABLED PTC5/
LLWU_P9
SPI0_SCK LPTMR0_
ALT2
I2S0_RXD0 FB_AD10 CMP0_OUT
C7 78 PTC6/
LLWU_P10
CMP0_IN0 CMP0_IN0 PTC6/
LLWU_P10
SPI0_SOUT PDB0_EXTRG I2S0_RX_
BCLK
FB_AD9 I2S0_MCLK
B7 79 PTC7 CMP0_IN1 CMP0_IN1 PTC7 SPI0_SIN I2S0_RX_FS FB_AD8
A7 80 PTC8 ADC1_SE4b/
CMP0_IN2
ADC1_SE4b/
CMP0_IN2
PTC8 I2S0_MCLK FB_AD7
D6 81 PTC9 ADC1_SE5b/
CMP0_IN3
ADC1_SE5b/
CMP0_IN3
PTC9 I2S0_RX_
BCLK
FB_AD6 FTM2_FLT0
C6 82 PTC10 ADC1_SE6b ADC1_SE6b PTC10 I2C1_SCL I2S0_RX_FS FB_AD5
C5 83 PTC11/
LLWU_P11
ADC1_SE7b ADC1_SE7b PTC11/
LLWU_P11
I2C1_SDA I2S0_RXD1 FB_RW_b
B6 84 PTC12 DISABLED PTC12 UART4_RTS_
b
FB_AD27
A6 85 PTC13 DISABLED PTC13 UART4_CTS_
b
FB_AD26
A5 86 PTC14 DISABLED PTC14 UART4_RX FB_AD25
B5 87 PTC15 DISABLED PTC15 UART4_TX FB_AD24
— 88 VSS VSS VSS
— 89 VDD VDD VDD
D5 90 PTC16 DISABLED PTC16 UART3_RX FB_CS5_b/
FB_TSIZ1/
FB_BE23_16_
b
Pinout
K10 Sub-Family Data Sheet, Rev. 3, 11/2012.
66 Freescale Semiconductor, Inc.