Information

I2Cx_C2 field descriptions (continued)
Field Description
4
SBRC
Slave Baud Rate Control
Enables independent slave mode baud rate at maximum frequency, which forces clock stretching on SCL
in very fast I2C modes. To a slave, an example of a "very fast" mode is when the master transfers at 40
kbps but the slave can capture the master's data at only 10 kbps.
0 The slave baud rate follows the master baud rate and clock stretching may occur
1 Slave baud rate is independent of the master baud rate
3
RMEN
Range Address Matching Enable
This bit controls slave address matching for addresses between the values of the A1 and RA registers.
When this bit is set, a slave address match occurs for any address greater than the value of the A1
register and less than or equal to the value of the RA register.
0 Range mode disabled. No address match occurs for an address within the range of values of the A1
and RA registers.
1 Range mode enabled. Address matching occurs when a slave receives an address within the range
of values of the A1 and RA registers.
2–0
AD[10:8]
Slave Address
Contains the upper three bits of the slave address in the 10-bit address scheme. This field is valid only
while the ADEXT bit is set.
44.3.7 I2C Programmable Input Glitch Filter register (I2Cx_FLT)
Addresses: I2C0_FLT is 4006_6000h base + 6h offset = 4006_6006h
Bit 7 6 5 4 3 2 1 0
Read
Reserved
0
FLT
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_FLT field descriptions
Field Description
7
Reserved
This field is reserved.
6–5
Reserved
This read-only field is reserved and always has the value zero.
4–0
FLT
I2C Programmable Filter Factor
Controls the width of the glitch, in terms of bus clock cycles, that the filter must absorb. For any glitch
whose size is less than or equal to this width setting, the filter does not allow the glitch to pass.
00h No filter/bypass
01-1Fh Filter glitches up to width of n bus clock cycles, where n=1-31d
Chapter 44 Inter-Integrated Circuit (I2C)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1017