Information

UART memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_B006 UART Control Register 3 (UART1_C3) 8 R/W 00h
45.3.7/
1061
4006_B007 UART Data Register (UART1_D) 8 R/W 00h
45.3.8/
1063
4006_B008 UART Match Address Registers 1 (UART1_MA1) 8 R/W 00h
45.3.9/
1064
4006_B009 UART Match Address Registers 2 (UART1_MA2) 8 R/W 00h
45.3.10/
1065
4006_B00A UART Control Register 4 (UART1_C4) 8 R/W 00h
45.3.11/
1065
4006_B00B UART Control Register 5 (UART1_C5) 8 R/W 00h
45.3.12/
1066
4006_B00C UART Extended Data Register (UART1_ED) 8 R 00h
45.3.13/
1067
4006_B00D UART Modem Register (UART1_MODEM) 8 R/W 00h
45.3.14/
1068
4006_B00E UART Infrared Register (UART1_IR) 8 R/W 00h
45.3.15/
1069
4006_B010 UART FIFO Parameters (UART1_PFIFO) 8 R/W See section
45.3.16/
1070
4006_B011 UART FIFO Control Register (UART1_CFIFO) 8 R/W 00h
45.3.17/
1072
4006_B012 UART FIFO Status Register (UART1_SFIFO) 8 R/W C0h
45.3.18/
1073
4006_B013 UART FIFO Transmit Watermark (UART1_TWFIFO) 8 R/W 00h
45.3.19/
1074
4006_B014 UART FIFO Transmit Count (UART1_TCFIFO) 8 R 00h
45.3.20/
1075
4006_B015 UART FIFO Receive Watermark (UART1_RWFIFO) 8 R/W 01h
45.3.21/
1075
4006_B016 UART FIFO Receive Count (UART1_RCFIFO) 8 R 00h
45.3.22/
1076
4006_B018 UART 7816 Control Register (UART1_C7816) 8 R/W 00h
45.3.23/
1076
4006_B019 UART 7816 Interrupt Enable Register (UART1_IE7816) 8 R/W 00h
45.3.24/
1078
4006_B01A UART 7816 Interrupt Status Register (UART1_IS7816) 8 R/W 00h
45.3.25/
1079
4006_B01B UART 7816 Wait Parameter Register (UART1_WP7816T0) 8 R/W 0Ah
45.3.26/
1081
Table continues on the next page...
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1047