Information

3.8.2.9 FTM Global Time Base
This chip provides the optional FTM global time base feature (see Global time base
(GTB)).
FTM0 provides the only source for the FTM global time base. The other FTM modules
can share the time base as shown in the following figure:
gtb_in
FTM1
GTBEEN = 1
FTM Counter
CONF Register
GTBEOUT = 0
FTM0
GTBEEN = 1
FTM Counter
CONF Register
GTBEOUT = 1
gtb_out
gtb_in
Figure 3-35. FTM Global Time Base Configuration
3.8.2.10 FTM BDM and debug halt mode
In the FTM chapter, references to the chip being in "BDM" are the same as the chip being
in “debug halt mode".
3.8.3 PIT Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 107