Information

UARTx_IE field descriptions (continued)
Field Description
1
PSIE
Preamble Start Interrupt Enable
Interrupt enable for preamble start flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
0
TXFIE
Transmission Fail Interrupt Enable
Interrupt enable for transmission fail flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
45.3.41 UART CEA709.1-B WBASE (UARTx_WB)
Addresses: UART0_WB is 4006_A000h base + 2Ah offset = 4006_A02Ah
UART1_WB is 4006_B000h base + 2Ah offset = 4006_B02Ah
UART2_WB is 4006_C000h base + 2Ah offset = 4006_C02Ah
Bit 7 6 5 4 3 2 1 0
Read
WBASE
Write
Reset
0 0 0 0 0 0 0 0
UARTx_WB field descriptions
Field Description
7–0
WBASE
CEA709.1-B WBASE register
Size of the basic randomizing window in bit periods after Beta1 time period.
45.3.42 UART CEA709.1-B Status Register (UARTx_S3)
Addresses: UART0_S3 is 4006_A000h base + 2Bh offset = 4006_A02Bh
UART1_S3 is 4006_B000h base + 2Bh offset = 4006_B02Bh
UART2_S3 is 4006_C000h base + 2Bh offset = 4006_C02Bh
Bit 7 6 5 4 3 2 1 0
Read
PEF WBEF
ISD
PRXF PTXF PCTEF PSF TXFF
Write
Reset
0 0 0 0 0 0 0 0
Memory map and registers
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
1090 Freescale Semiconductor, Inc.