Information
I2Sx_TCR4 field descriptions (continued)
Field Description
0
FSD
Frame Sync Direction
Configures the direction of the frame sync.
0 Frame sync is generated externally in Slave mode.
1 Frame sync is generated internally in Master mode.
46.3.6 SAI Transmit Configuration 5 Register (I2Sx_TCR5)
This register must not be altered when TCSR[TE] is set.
Addresses: I2S0_TCR5 is 4002_F000h base + 14h offset = 4002_F014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
WNW
0
W0W
0
FBT
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2Sx_TCR5 field descriptions
Field Description
31–29
Reserved
This read-only field is reserved and always has the value zero.
28–24
WNW
Word N Width
Configures the number of bits in each word, for each word except the first in the frame. The value written
must be one less than the number of bits per word. The value of WNW must be greater than or equal to
the value of W0W even when there is only one word in each frame. Word width of less than 8 bits is not
supported.
23–21
Reserved
This read-only field is reserved and always has the value zero.
20–16
W0W
Word 0 Width
Configures the number of bits in the first word in each frame. The value written must be one less than the
number of bits in the first word. Word width of less than 8 bits is not supported if there is only one word
per frame.
15–13
Reserved
This read-only field is reserved and always has the value zero.
12–8
FBT
First Bit Shifted
Configures the bit index for the first bit transmitted for each word in the frame. If configured for MSB First,
the index of the next bit transmitted is one less than the current bit transmitted. If configured for LSB First,
the index of the next bit transmitted is one more than the current bit transmitted. The value written must
be greater than or equal to the word width when configured for MSB First. The value written must be less
than or equal to 31-word width when configured for LSB First.
7–0
Reserved
This read-only field is reserved and always has the value zero.
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
1154 Freescale Semiconductor, Inc.