Information

Signal multiplexing
Register
access
Peripheral
bridge
Module signals
2
I C
Figure 3-49. I2C configuration
Table 3-60. Reference links to related information
Topic Related module Reference
Full description I
2
C I
2
C
System memory map System memory map
Clocking Clock Distribution
Power management Power management
Signal Multiplexing Port control Signal Multiplexing
3.9.4 UART Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal multiplexing
Register
access
Peripheral
bridge
Module signals
UART
Figure 3-50. UART configuration
Table 3-61. Reference links to related information
Topic Related module Reference
Full description UART UART
System memory map System memory map
Clocking Clock Distribution
Table continues on the next page...
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 121