Information

Table 3-61. Reference links to related information (continued)
Topic Related module Reference
Power management Power management
Signal Multiplexing Port control Signal Multiplexing
3.9.4.1 UART configuration information
This device contains three UART modules. This section describes how each module is
configured on this device.
1. Standard features of all UARTs:
• RS-485 support
• Hardware flow control (RTS/CTS)
• 9-bit UART to support address mark with parity
• MSB/LSB configuration on data
2. UART0 and UART1 are clocked from the core clock, the remaining UARTs are
clocked on the bus clock. The maximum baud rate is 1/16 of related source clock
frequency.
3. IrDA is available on all UARTs
4. UART0 contains the standard features plus ISO7816
5. UART0 contain 8-entry transmit and 8-entry receive FIFOs
6. All other UARTs contain a 1-entry transmit and receive FIFOs
7. CEA709.1-B (LON) is available in UART0
3.9.4.2 UART wakeup
The UART can be configured to generate an interrupt/wakeup on the first active edge that
it receives.
3.9.4.3 UART interrupts
The UART has multiple sources of interrupt requests. However, some of these sources
are OR'd together to generate a single interrupt request. See below for the mapping of the
individual interrupt sources to the interrupt request:
The status interrupt combines the following interrupt sources:
Communication interfaces
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
122 Freescale Semiconductor, Inc.