Information

• Module enables
• The module address
• Transfer attributes
• Byte enables
• Write data
The peripheral bridge captures read data from the peripheral interface and drives it to the
crossbar switch.
Each peripheral is allocated one block of the memory map. Two global external module
enables are available for the remaining address space to allow for customization and
expansion of addressed peripheral devices.
19.2 Functional description
The peripheral bridge serves as an interface between the crossbar switch and the slave
peripheral bus. It functions as a protocol translator.
The peripheral bridge generates select signals for modules on the peripheral bus by
decoding accesses within the peripheral bridge address space.
19.2.1 Access support
Aligned and misaligned 32-bit and 16-bit accesses, as well as byte accesses are supported
for 32-bit peripherals. Misaligned accesses are supported to allow memory to be placed
on the slave peripheral bus. Peripheral registers must not be misaligned, although no
explicit checking is performed by the peripheral bridge. All accesses are performed with
a single transfer.
All accesses to the peripheral slots must be sized less than or equal to the designated
peripheral slot size. If an access is attempted which is larger than the targeted port, an
error response is generated.
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
318 Freescale Semiconductor, Inc.