Information

DMA_TCDn_ATTR field descriptions (continued)
Field Description
7–3
DMOD
Destination Address Modulo
See the SMOD definition
2–0
DSIZE
Destination Data Transfer Size
See the SSIZE definition
21.3.20 TCD Minor Byte Count (Minor Loop Disabled)
(DMA_TCD_NBYTES_MLNO)
TCD word 2's register definition depends on the status of minor loop mapping. If minor
loop mapping is disabled (CR[EMLM] = 0), TCD word 2 is defined as follows. If minor
loop mapping is enabled, see the TCD_NBYTES_MLOFFNO and
TCD_NBYTES_MLOFFYES register descriptions for TCD word 2's register definition.
Addresses: TCD0_NBYTES_MLNO is 4000_8000h base + 1008h offset = 4000_9008h
TCD1_NBYTES_MLNO is 4000_8000h base + 1028h offset = 4000_9028h
TCD2_NBYTES_MLNO is 4000_8000h base + 1048h offset = 4000_9048h
TCD3_NBYTES_MLNO is 4000_8000h base + 1068h offset = 4000_9068h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
NBYTES
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_NBYTES_MLNO field descriptions
Field Description
31–0
NBYTES
Minor Byte Transfer Count
Number of bytes to be transferred in each service request of the channel. As a channel activates, the
appropriate TCD contents load into the eDMA engine, and the appropriate reads and writes perform until
the minor byte transfer count has transferred. This is an indivisible operation and cannot be halted.
(Although, it may be stalled by using the bandwidth control field, or via preemption.) After the minor count
is exhausted, the SADDR and DADDR values are written back into the TCD memory, the major iteration
count is decremented and restored to the TCD memory. If the major iteration count is completed,
additional processing is performed.
NOTE: An NBYTES value of 0x0000_0000 is interpreted as a 4 GB transfer.
Memory map/register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
360 Freescale Semiconductor, Inc.