Information

Section Number Title Page
3.2 Core modules................................................................................................................................................................59
3.2.1 ARM Cortex-M4 Core Configuration..........................................................................................................59
3.2.2 Nested Vectored Interrupt Controller (NVIC) Configuration......................................................................61
3.2.3 Asynchronous Wake-up Interrupt Controller (AWIC) Configuration.........................................................66
3.2.4 JTAG Controller Configuration...................................................................................................................68
3.3 System modules............................................................................................................................................................68
3.3.1 SIM Configuration.......................................................................................................................................68
3.3.2 System Mode Controller (SMC) Configuration...........................................................................................69
3.3.3 PMC Configuration......................................................................................................................................69
3.3.4 Low-Leakage Wake-up Unit (LLWU) Configuration.................................................................................70
3.3.5 MCM Configuration....................................................................................................................................72
3.3.6 Crossbar-Light Switch Configuration..........................................................................................................73
3.3.7 Peripheral Bridge Configuration..................................................................................................................75
3.3.8 DMA request multiplexer configuration......................................................................................................75
3.3.9 DMA Controller Configuration...................................................................................................................78
3.3.10 External Watchdog Monitor (EWM) Configuration....................................................................................79
3.3.11 Watchdog Configuration..............................................................................................................................81
3.4 Clock Modules..............................................................................................................................................................82
3.4.1 MCG Configuration.....................................................................................................................................82
3.4.2 OSC Configuration......................................................................................................................................83
3.4.3 RTC OSC configuration...............................................................................................................................84
3.5 Memories and Memory Interfaces................................................................................................................................84
3.5.1 Flash Memory Configuration.......................................................................................................................84
3.5.2 Flash Memory Controller Configuration.....................................................................................................88
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
4 Freescale Semiconductor, Inc.