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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFN 48 EP (7x7) 32-Bit 50 MHz I/O number 29

Section Number Title Page

45.3.40 UART CEA709.1-B Interrupt Enable Register (UARTx_IE).....................................................................1089

45.3.41 UART CEA709.1-B WBASE (UARTx_WB).............................................................................................1090

45.3.42 UART CEA709.1-B Status Register (UARTx_S3).....................................................................................1090

45.3.43 UART CEA709.1-B Status Register (UARTx_S4).....................................................................................1092

45.3.44 UART CEA709.1-B Received Packet Length (UARTx_RPL)...................................................................1093

45.3.45 UART CEA709.1-B Received Preamble Length (UARTx_RPREL)..........................................................1093

45.3.46 UART CEA709.1-B Collision Pulse Width (UARTx_CPW).....................................................................1094

45.3.47 UART CEA709.1-B Receive Indeterminate Time (UARTx_RIDT)...........................................................1094

45.3.48 UART CEA709.1-B Transmit Indeterminate Time (UARTx_TIDT).........................................................1095

45.4 Functional description...................................................................................................................................................1095

45.4.1 CEA709.1-B.................................................................................................................................................1095

45.4.2 Transmitter...................................................................................................................................................1105

45.4.3 Receiver.......................................................................................................................................................1111

45.4.4 Baud rate generation....................................................................................................................................1120

45.4.5 Data format (non ISO-7816)........................................................................................................................1122

45.4.6 Single-wire operation...................................................................................................................................1125

45.4.7 Loop operation.............................................................................................................................................1126

45.4.8 ISO-7816/smartcard support........................................................................................................................1126

45.4.9 Infrared interface..........................................................................................................................................1131

45.5 Reset..............................................................................................................................................................................1132

45.6 System level interrupt sources......................................................................................................................................1132

45.6.1 RXEDGIF description..................................................................................................................................1133

45.7 DMA operation.............................................................................................................................................................1134

45.8 Application information................................................................................................................................................1134

45.8.1 Transmit/receive data buffer operation........................................................................................................1134

45.8.2 ISO-7816 initialization sequence.................................................................................................................1135

45.8.3 Initialization sequence (non ISO-7816).......................................................................................................1137

45.8.4 Overrun (OR) flag implications...................................................................................................................1138

45.8.5 Overrun NACK considerations....................................................................................................................1139

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

40 Freescale Semiconductor, Inc.