Information

Chapter 27
Flash Memory Controller (FMC)
27.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
The Flash Memory Controller (FMC) is a memory acceleration unit that provides:
• an interface between the device and the program flash memory and FlexNVM.
• buffers that can accelerate flash memory and FlexNVM data transfers.
27.1.1 Overview
The Flash Memory Controller manages the interface between the device and the flash
memory. The FMC receives status information detailing the configuration of the memory
and uses this information to ensure a proper interface. The following table shows the
supported 8-bit, 16-bit, and 32-bit read/write operations.
Flash memory type Read Write
Program flash memory x —
1
FlexNVM used as data flash memory x —
1
FlexNVM and FlexRAM used as
EEPROM
x x
1. A write operation to program flash memory or to FlexNVM used as data flash memory results in a bus error.
In addition, the FMC provides three separate mechanisms for accelerating the interface
between the device and the flash memory. A 32-bit speculation buffer can prefetch the
next 32-bit flash memory location, and both a 4-way, 2-set cache and a single-entry 32-
bit buffer can store previously accessed flash memory or FlexNVM data for quick access
times.
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 481