Information

During the reset sequence, the register is loaded from the flash nonvolatile option byte in
the Flash Configuration Field located in program flash memory. The flash basis for the
values is signified by X in the reset value.
Address: FTFL_FOPT is 4002_0000h base + 3h offset = 4002_0003h
Bit 7 6 5 4 3 2 1 0
Read OPT
Write
Reset
x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
FTFL_FOPT field descriptions
Field Description
7–0
OPT
Nonvolatile Option
These bits are loaded from flash to this register at reset. Refer to the device's Chip Configuration details
for the definition and use of these bits.
28.34.5 Flash Common Command Object Registers
(FTFL_FCCOBn)
The FCCOB register group provides 12 bytes for command codes and parameters. The
individual bytes within the set append a 0-B hex identifier to the FCCOB register name:
FCCOB0, FCCOB1, ..., FCCOBB.
Addresses: 4002_0000h base + 4h offset + (1d × n), where n = 0d to 11d
Bit 7 6 5 4 3 2 1 0
Read
CCOBn
Write
Reset
0 0 0 0 0 0 0 0
FTFL_FCCOBn field descriptions
Field Description
7–0
CCOBn
The FCCOB register provides a command code and relevant parameters to the memory controller. The
individual registers that compose the FCCOB data set can be written in any order, but you must provide
all needed values, which vary from command to command. First, set up all required FCCOB fields and
then initiate the command’s execution by writing a 1 to the FSTAT[CCIF] bit. This clears the CCIF bit,
which locks all FCCOB parameter fields and they cannot be changed by the user until the command
completes (CCIF returns to 1). No command buffering or queueing is provided; the next command can be
loaded only after the current command completes.
Some commands return information to the FCCOB registers. Any values returned to FCCOB are available
for reading after the FSTAT[CCIF] flag returns to 1 by the memory controller.
Chapter 28 Flash Memory Module (FTFL)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 511