Information

2.4.7 Timer modules
The following timer modules are available on this device:
Table 2-8. Timer modules
Module Description
Programmable delay block (PDB) 16-bit resolution
3-bit prescaler
Positive transition of trigger event signal initiates the counter
Supports two triggered delay output signals, each with an independently-
controlled delay from the trigger event
Outputs can be OR'd together to schedule two conversions from one input
trigger event and can schedule precise edge placement for a pulsed output.
This feature is used to generate the control signal for the CMP windowing
feature and output to a package pin if needed for applications, such as
critical conductive mode power factor correction.
Continuous-pulse output or single-shot mode supported, each output is
independently enabled, with possible trigger events
Supports bypass mode
Supports DMA
Flexible timer modules (FTM) Selectable FTM source clock, programmable prescaler
16-bit counter supporting free-running or initial/final value, and counting is up
or up-down
Input capture, output compare, and edge-aligned and center-aligned PWM
modes
Operation of FTM channels as pairs with equal outputs, pairs with
complimentary outputs, or independent channels with independent outputs
Deadtime insertion is available for each complementary pair
Generation of hardware triggers
Software control of PWM outputs
Up to 4 fault inputs for global fault control
Configurable channel polarity
Programmable interrupt on input capture, reference compare, overflowed
counter, or detected fault condition
Quadrature decoder with input filters, relative position counting, and interrupt
on position count or capture of position count on external event
DMA support for FTM events
Periodic interrupt timers (PIT) Four general purpose interrupt timers
Interrupt timers for triggering ADC conversions
32-bit counter resolution
Clocked by system clock frequency
DMA support
Low-power timer (LPTimer) Selectable clock for prescaler/glitch filter of 1 kHz (internal LPO), 32.768 kHz
(external crystal), or internal reference clock
Configurable Glitch Filter or Prescaler with 16-bit counter
16-bit time or pulse counter with compare
Interrupt generated on Timer Compare
Hardware trigger generated on Timer Compare
Table continues on the next page...
Chapter 2 Introduction
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 55