Information

CMPx_CR1 field descriptions (continued)
Field Description
1
OPE
Comparator Output Pin Enable
0 CMPO is not available on the associated CMPO output pin.
1
CMPO is available on the associated CMPO output pin.
0
EN
Comparator Module Enable
Enables the Analog Comparator module. When the module is not enabled, it remains in the off state, and
consumes no power. When the user selects the same input from analog mux to the positive and negative
port, the comparator is disabled automatically.
0 Analog Comparator is disabled.
1 Analog Comparator is enabled.
32.7.3 CMP Filter Period Register (CMPx_FPR)
Addresses: CMP0_FPR is 4007_3000h base + 2h offset = 4007_3002h
CMP1_FPR is 4007_3008h base + 2h offset = 4007_300Ah
Bit 7 6 5 4 3 2 1 0
Read
FILT_PER
Write
Reset
0 0 0 0 0 0 0 0
CMPx_FPR field descriptions
Field Description
7–0
FILT_PER
Filter Sample Period
Specifies the sampling period, in bus clock cycles, of the comparator output filter, when CR1[SE]=0.
Setting FILT_PER to 0x0 disables the filter. Filter programming and latency details appear in the CMP
functional description.
This field has no effect when CR1[SE]=1. In that case, the external SAMPLE signal is used to determine
the sampling period.
32.7.4 CMP Status and Control Register (CMPx_SCR)
Addresses: CMP0_SCR is 4007_3000h base + 3h offset = 4007_3003h
CMP1_SCR is 4007_3008h base + 3h offset = 4007_300Bh
Bit 7 6 5 4 3 2 1 0
Read 0
DMAEN
0
IER IEF
CFR CFF COUT
Write w1c w1c
Reset
0 0 0 0 0 0 0 0
Chapter 32 Comparator (CMP)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 639