Information

FTM counter
CNTIN
C(n+1)V
not fully 0% duty cycle
channel (n) output
with ELSnB:ELSnA = 1:0
not fully 100% duty cycle
channel (n) output
with ELSnB:ELSnA = X:1
MOD = C(n)V
Figure 35-161. Channel (n) output if (C(n+1)V > MOD) and (CNTIN < C(n)V = MOD)
35.4.8.1 Asymmetrical PWM
In Combine mode, the control of the PWM signal first edge, when the channel (n) match
occurs, that is, FTM counter = C(n)V, is independent of the control of the PWM signal
second edge, when the channel (n+1) match occurs, that is, FTM counter = C(n+1)V. So,
Combine mode allows the generation of asymmetrical PWM signals.
35.4.9 Complementary mode
The Complementary mode is selected when:
• FTMEN = 1
• QUADEN = 0
• DECAPEN = 0
• COMBINE = 1
• CPWMS = 0, and
• COMP = 1
In Complementary mode, the channel (n+1) output is the inverse of the channel (n)
output.
If (FTMEN = 1), (QUADEN = 0), (DECAPEN = 0), (COMBINE = 1), (CPWMS = 0),
and (COMP = 0), then the channel (n+1) output is the same as the channel (n) output.
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
762 Freescale Semiconductor, Inc.