Information

External Watchdog

Monitor (EWM)

Peripheral

bridge 0

access

Signal multiplexing

Module signals

Figure 3-14. External Watchdog Monitor configuration

Table 3-20. Reference links to related information

Topic Related module Reference

Full description External Watchdog

Monitor (EWM)

EWM

System memory map System memory map

Clocking Clock distribution

Power management Power management

Signal multiplexing Port Control Module Signal multiplexing

3.3.10.1 EWM clocks

This table shows the EWM clocks and the corresponding chip clocks.

Table 3-21. EWM clock connections

Module clock Chip clock

Low Power Clock 1 kHz LPO Clock

3.3.10.2 EWM low-power modes

This table shows the EWM low-power modes and the corresponding chip low-power

modes.

Table 3-22. EWM low-power modes

Module mode Chip mode

Wait Wait, VLPW

Stop Stop, VLPS, LLS

Power Down VLLS3, VLLS2, VLLS1

System modules

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

80 Freescale Semiconductor, Inc.