Information

37.4.5 LPTMR counter

The CNR increments by one on every:

• Prescaler clock in Time Counter mode with prescaler bypassed

• Prescaler output in Time Counter mode with prescaler enabled

• Input source assertion in Pulse Counter mode with glitch filter bypassed

• Glitch filter output in Pulse Counter mode with glitch filter enabled

The CNR is reset when the LPTMR is disabled or if the counter register overflows. If

CSR[TFC] is set, then the CNR is also reset whenever CSR[TCF] is set.

The CNR continues incrementing when the core is halted in Debug mode.

The CNR cannot be initialized, but can be read at any time. On each read of the CNR,

software must first write to the CNR with any value. This will synchronize and register

the current value of the CNR into a temporary register. The contents of the temporary

When reading the CNR, the bus clock must be at least two times faster than the rate at

which the LPTMR counter is incrementing, otherwise incorrect data may be returned.

37.4.6 LPTMR hardware trigger

The LPTMR hardware trigger asserts at the same time the CSR[TCF] is set and can be

used to trigger hardware events in other peripherals without software intervention. The

hardware trigger is always enabled.

When Then

The CMR is set to 0 with CSR[TFC] clear The LPTMR hardware trigger will assert on the first compare

and does not deassert.

The CMR is set to a nonzero value, or, if CSR[TFC] is set The LPTMR hardware trigger will assert on each compare

and deassert on the following increment of the CNR.

37.4.7 LPTMR interrupt

The LPTMR interrupt is generated whenever CSR[TIE] and CSR[TCF] are set.

CSR[TCF] is cleared by disabling the LPTMR or by writing a logic 1 to it.

CSR[TIE] can be altered and CSR[TCF] can be cleared while the LPTMR is enabled.

The LPTMR interrupt is generated asynchronously to the system clock and can be used to

generate a wakeup from any low-power mode, including the low-leakage modes,

provided the LPTMR is enabled as a wakeup source.

Functional description

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

836 Freescale Semiconductor, Inc.