Information

SRAM upper
Transfers
Cortex-M4
core
switch
SRAM lower
crossbar
SRAM
controller
SRAM
controller
Figure 3-22. SRAM configuration
Table 3-31. Reference links to related information
Topic Related module Reference
Full description SRAM SRAM
System memory map System memory map
Clocking Clock Distribution
Transfers SRAM controller SRAM controller
ARM Cortex-M4 core ARM Cortex-M4 core
3.5.3.1 SRAM sizes
This device contains SRAM which could be accessed by bus masters through cross-bar
switch. The amount of SRAM for the devices covered in this document is shown in the
following table.
Device SRAM (KB)
MK20DN32VLF5 8
MK20DX32VLF5 8
MK20DN64VLF5 16
MK20DX64VLF5 16
MK20DN128VLF5 16
MK20DX128VLF5 16
MK20DN32VFT5 8
MK20DX32VFT5 8
MK20DN64VFT5 16
MK20DX64VFT5 16
MK20DN128VFT5 16
MK20DX128VFT5 16
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 89