Information

Section Number Title Page
10.2.4 Signal multiplexing constraints....................................................................................................................193
10.3 Pinout............................................................................................................................................................................193
10.3.1 K20 Signal Multiplexing and Pin Assignments...........................................................................................193
10.3.2 K20 Pinouts..................................................................................................................................................195
10.4 Module Signal Description Tables................................................................................................................................196
10.4.1 Core Modules...............................................................................................................................................196
10.4.2 System Modules...........................................................................................................................................197
10.4.3 Clock Modules.............................................................................................................................................198
10.4.4 Memories and Memory Interfaces...............................................................................................................198
10.4.5 Analog..........................................................................................................................................................198
10.4.6 Communication Interfaces...........................................................................................................................199
10.4.7 Human-Machine Interfaces (HMI)..............................................................................................................201
Chapter 11
Port control and interrupts (PORT)
11.1 Introduction...................................................................................................................................................................203
11.1.1 Overview......................................................................................................................................................203
11.1.2 Features........................................................................................................................................................203
11.1.3 Modes of operation......................................................................................................................................204
11.2 External signal description............................................................................................................................................204
11.3 Detailed signal description............................................................................................................................................205
11.4 Memory map and register definition.............................................................................................................................205
11.4.1 Pin Control Register n (PORTx_PCRn).......................................................................................................211
11.4.2 Global Pin Control Low Register (PORTx_GPCLR)..................................................................................214
11.4.3 Global Pin Control High Register (PORTx_GPCHR).................................................................................214
11.4.4 Interrupt Status Flag Register (PORTx_ISFR)............................................................................................215
11.5 Functional description...................................................................................................................................................216
11.5.1 Pin control....................................................................................................................................................216
11.5.2 Global pin control........................................................................................................................................216
11.5.3 External interrupts........................................................................................................................................217
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 9