Information

41.5.1.4 Charging port detection
After it detects that the data pins have made contact, the module waits for a fixed delay of
1 ms, and then attempts to detect whether it is plugged into a charging port. The module
connects the following analog units to the USB D+ or D– lines during this phase:
• The voltage source V
DP_SRC
connects to the D+ line
• The current sink I
DM_SINK
connects to the D– line
• The voltage comparator connects to the USB D– line, comparing it to the voltage
V
DAT_REF
.
After a time of T
VDPSRC_ON
, the module samples the D– line. The T
VDPSRC_ON
parameter
is programmable and defaults to 40 ms. After sampling the D– line, the module
disconnects the voltage source, current sink, and comparator.
The next steps in the sequence depend on the voltage on the D– line as determined by the
voltage comparator. See the following table.
Table 41-16. Sampling D– in the charging port detection phase
If the voltage on D- is... Then... See...
Below V
DAT_REF
The port is a standard host that does not support the
USB Battery Charging Specification v1.1.
Standard host
port
Above V
DAT_REF
but below V
LGC
The port is a charging port. Charging port
Above V
LGC
This is an error condition.
Error in charging
port detection
41.5.1.4.1 Standard host port
As part of the charger detection handshake with a standard USB host, the module does
the following without waiting for the T
VDPSRC_CON
interval to elapse:
• Updates the STATUS register to reflect that a standard host has been detected with
SEQ_RES = 01. See Table 41-18 for field values.
• Sets CONTROL[IF].
• Generates an interrupt if enabled in CONTROL[IE].
At this point, control has been passed to system software via the interrupt. The rest of the
sequence, which detects the type of charging port, is not applicable, so software should
perform the following steps:
Chapter 41 USB Device Charger Detection Module (USBDCD)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 941