Information

Table 31. USB VREG electrical specifications
(continued)
Symbol Description Min.
Typ.
1
Max. Unit Notes
C
OUT
External output capacitor 1.76 2.2 8.16 μF
ESR External output capacitor equivalent series
resistance
1 — 100 mΩ
I
LIM
Short circuit current — 290 — mA
1. Typical values assume VREGIN = 5.0 V, Temp = 25 °C unless otherwise stated.
2. Operating in pass-through mode: regulator output voltage equal to the input voltage minus a drop proportional to I
Load
.
6.8.4 DSPI switching specifications (limited voltage range)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provide DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Table 32. Master mode DSPI timing (limited voltage range)
Num Description Min. Max. Unit Notes
Operating voltage 2.7 3.6 V
Frequency of operation — 25 MHz
DS1 DSPI_SCK output cycle time 2 x t
BUS
— ns
DS2 DSPI_SCK output high/low time (t
SCK
/2) − 2 (t
SCK
/2) + 2 ns
DS3 DSPI_PCSn valid to DSPI_SCK delay (t
BUS
x 2) −
2
— ns 1
DS4 DSPI_SCK to DSPI_PCSn invalid delay (t
BUS
x 2) −
2
— ns 2
DS5 DSPI_SCK to DSPI_SOUT valid — 8 ns
DS6 DSPI_SCK to DSPI_SOUT invalid 0 — ns
DS7 DSPI_SIN to DSPI_SCK input setup 14 — ns
DS8 DSPI_SCK to DSPI_SIN input hold 0 — ns
1. The delay is programmable in SPIx_CTARn[PSSCK] and SPIx_CTARn[CSSCK].
2. The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC].
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
46 Freescale Semiconductor, Inc.