Information

8.2 K20 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
VSSA
VREFL
VREFH
VDDA
ADC0_DM0
ADC0_DP0
VREGIN
VOUT33
USB0_DM
USB0_DP
VSS
VDD
12
11
10
9
8
7
6
5
4
3
2
1
48
47
46
45
44
43
42
41
40
39
38
37
PTD7 PTD6/LLWU_P15 PTD5 PTD4/LLWU_P14 PTD3 PTD2/LLWU_P13 PTD1 PTD0/LLWU_P12 PTC7 PTC6/LLWU_P10 PTC5/LLWU_P9 PTC4/LLWU_P8
36
35
34
33
PTC3/LLWU_P7
PTC2
PTC1/LLWU_P6
PTC0
32
31
30
29
28
27
26
25
PTB17
PTB16
PTB3
PTB2
PTB1
PTB0/LLWU_P5
RESET_b
PTA19
PTA3
PTA2
PTA1
PTA0
24 23
22
21
20
19
18
17
VBAT
EXTAL32
XTAL32
VREF_OUT/CMP1_IN5/CMP0_IN5
16 15 14 13
PTA18
VSS
VDD
PTA4/LLWU_P3
Figure 23. K20 48 LQFP/QFN Pinout Diagram
9 Revision History
The following table provides a revision history for this document.
Revision History
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
58 Freescale Semiconductor, Inc.