Information

I2Cx_C1 field descriptions (continued)
Field Description
Selects the direction of master and slave transfers. In master mode this bit must be set according to the
type of transfer required. Therefore, for address cycles, this bit is always set. When addressed as a slave
this bit must be set by software according to the SRW bit in the status register.
0 Receive
1 Transmit
3
TXAK
Transmit Acknowledge Enable
Specifies the value driven onto the SDA during data acknowledge cycles for both master and slave
receivers. The value of the FACK bit affects NACK/ACK generation.
0 An acknowledge signal is sent to the bus on the following (if FACK is cleared) or current (if FACK is
set) receiving byte.
1 No acknowledge signal is sent to the bus on the following (if FACK is cleared) or current (if FACK is
set) receiving data byte.
NOTE: SCL is held low until TXAK is written.
2
RSTA
Repeat START
Writing a one to this bit generates a repeated START condition provided it is the current master. This bit
will always be read as zero. Attempting a repeat at the wrong time results in loss of arbitration.
1
WUEN
Wakeup Enable
The I2C module can wake the MCU from low power mode with no peripheral bus running when slave
address matching occurs.
0 Normal operation. No interrupt generated when address matching in low power mode.
1 Enables the wakeup function in low power mode.
0
DMAEN
DMA Enable
The DMAEN bit enables or disables the DMA function.
0 All DMA signalling disabled.
1
DMA transfer is enabled and the following conditions trigger the DMA request:
• While FACK = 0, a data byte is received, either address or data is transmitted. (ACK/NACK
automatic)
• While FACK = 0, the first byte received matches the A1 register or is general call address.
If any address matching occurs, IAAS and TCF are set. If the direction of transfer is known from
master to slave, then it is not required to check the SRW. With this assumption, DMA can also be
used in this case. In other cases, if the master reads data from the slave, then it is required to rewrite
the C1 register operation. With this assumption, DMA cannot be used.
When FACK = 1, an address or a data byte is transmitted.
Chapter 44 Inter-Integrated Circuit (I2C)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1015