Information

UART memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_B030
UART CEA709.1-B Receive Indeterminate Time
(UART1_RIDT)
8 R/W 00h
45.3.47/
1096
4006_B031
UART CEA709.1-B Transmit Indeterminate Time
(UART1_TIDT)
8 R/W 00h
45.3.48/
1097
4006_C000 UART Baud Rate Registers: High (UART2_BDH) 8 R/W 00h
45.3.1/
1053
4006_C001 UART Baud Rate Registers: Low (UART2_BDL) 8 R/W 04h
45.3.2/
1054
4006_C002 UART Control Register 1 (UART2_C1) 8 R/W 00h
45.3.3/
1055
4006_C003 UART Control Register 2 (UART2_C2) 8 R/W 00h
45.3.4/
1057
4006_C004 UART Status Register 1 (UART2_S1) 8 R C0h
45.3.5/
1058
4006_C005 UART Status Register 2 (UART2_S2) 8 R/W 00h
45.3.6/
1061
4006_C006 UART Control Register 3 (UART2_C3) 8 R/W 00h
45.3.7/
1063
4006_C007 UART Data Register (UART2_D) 8 R/W 00h
45.3.8/
1065
4006_C008 UART Match Address Registers 1 (UART2_MA1) 8 R/W 00h
45.3.9/
1066
4006_C009 UART Match Address Registers 2 (UART2_MA2) 8 R/W 00h
45.3.10/
1067
4006_C00A UART Control Register 4 (UART2_C4) 8 R/W 00h
45.3.11/
1067
4006_C00B UART Control Register 5 (UART2_C5) 8 R/W 00h
45.3.12/
1068
4006_C00C UART Extended Data Register (UART2_ED) 8 R 00h
45.3.13/
1069
4006_C00D UART Modem Register (UART2_MODEM) 8 R/W 00h
45.3.14/
1070
4006_C00E UART Infrared Register (UART2_IR) 8 R/W 00h
45.3.15/
1071
4006_C010 UART FIFO Parameters (UART2_PFIFO) 8 R/W See section
45.3.16/
1072
4006_C011 UART FIFO Control Register (UART2_CFIFO) 8 R/W 00h
45.3.17/
1074
4006_C012 UART FIFO Status Register (UART2_SFIFO) 8 R/W C0h
45.3.18/
1075
Table continues on the next page...
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1051