Information

45.3.40 UART CEA709.1-B Interrupt Enable Register (UARTx_IE)
Addresses: UART0_IE is 4006_A000h base + 29h offset = 4006_A029h
UART1_IE is 4006_B000h base + 29h offset = 4006_B029h
UART2_IE is 4006_C000h base + 29h offset = 4006_C029h
Bit 7 6 5 4 3 2 1 0
Read 0
WBEIE ISDIE PRXIE PTXIE PCTEIE PSIE TXFIE
Write
Reset
0 0 0 0 0 0 0 0
UARTx_IE field descriptions
Field Description
7
Reserved
This read-only field is reserved and always has the value zero.
6
WBEIE
WBASE Expired Interrupt Enable
Interrupt enable for WBASE expired flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
5
ISDIE
Initial Sync Detection Interrupt Enable
Interrupt enable for initial synchronization detection flag.
NOTE: This field cannot be cleared except by disabling CEA709. Therefore, ISDIE must be cleared
when the first initial sync detection interrupt occurs. If the ISD interrupt is not disabled in the
interrupt handler, then user will continuously get interrupts.
0 Interrupt is disabled.
1 Interrupt is enabled.
4
PRXIE
Packet Received Interrupt Enable
Interrupt enable for packet received flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
3
PTXIE
Packet Transmitted Interrupt Enable
Interrupt enable for packet transmitted flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
2
PCTEIE
Packet Cycle Timer Interrupt Enable
Interrupt enable for packet cycle time expired flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
Table continues on the next page...
Chapter 45 Universal Asynchronous Receiver/Transmitter (UART)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1091