Information

I2Sx_TCSR field descriptions (continued)
Field Description
0 Disables the DMA request.
1 Enables the DMA request.
0
FRDE
FIFO Request DMA Enable
Enables/disables DMA requests.
0 Disables the DMA request.
1 Enables the DMA request.
46.3.2 SAI Transmit Configuration 1 Register (I2Sx_TCR1)
Addresses: I2S0_TCR1 is 4002_F000h base + 4h offset = 4002_F004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TFW
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2Sx_TCR1 field descriptions
Field Description
31–2
Reserved
This read-only field is reserved and always has the value zero.
1–0
TFW
Transmit FIFO Watermark
Configures the watermark level for all enabled transmit channels.
46.3.3 SAI Transmit Configuration 2 Register (I2Sx_TCR2)
This register must not be altered when TCSR[TE] is set.
Addresses: I2S0_TCR2 is 4002_F000h base + 8h offset = 4002_F008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
SYNC
BCS
BCI
MSEL
BCP
BCD
0
DIV
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
1152 Freescale Semiconductor, Inc.