Information

46.3.9 SAI Transmit Mask Register (I2Sx_TMR)
This register is double-buffered and updates:
1. When TCSR[TE] is first set
2. At the end of each frame.
This allows the masked words in each frame to change from frame to frame.
Addresses: I2S0_TMR is 4002_F000h base + 60h offset = 4002_F060h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TWM
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2Sx_TMR field descriptions
Field Description
31–16
Reserved
This read-only field is reserved and always has the value zero.
15–0
TWM
Transmit Word Mask
Configures whether the transmit word is masked for each word in the frame.
0 Word N is enabled.
1 Word N is masked. The transmit data pins are tri-stated when masked.
46.3.10 SAI Receive Control Register (I2Sx_RCSR)
Addresses: I2S0_RCSR is 4002_F000h base + 80h offset = 4002_F080h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
RE
STOPE
DBGE
BCE
0 0
SR
0 WSF SEF FEF FWF FRF
W
FR w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
WSIE
SEIE FEIE
FWIE
FRIE
0 0
FWDE
FRDE
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
1158 Freescale Semiconductor, Inc.