Information

Chapter 47
General-Purpose Input/Output (GPIO)
47.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
The general-purpose input and output (GPIO) module communicates to the processor
core via a zero wait state interface for maximum pin performance. The GPIO registers
support 8-bit, 16-bit or 32-bit accesses.
The GPIO data direction and output data registers control the direction and output data of
each pin when the pin is configured for the GPIO function. The GPIO input data register
displays the logic value on each pin when the pin is configured for any digital function,
provided the corresponding Port Control and Interrupt module for that pin is enabled.
Efficient bit manipulation of the general-purpose outputs is supported through the
addition of set, clear, and toggle write-only registers for each port output data register.
47.1.1 Features
• Features of the GPIO module include:
• Pin input data register visible in all digital pin-multiplexing modes
• Pin output data register with corresponding set/clear/toggle registers
• Pin data direction register
• Zero wait state access to GPIO registers
47.1.2 Modes of operation
The following table depicts different modes of operation and the behavior of the GPIO
module in these modes.
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1177