Information

GPIO memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
400F_F0C0 Port Data Output Register (GPIOD_PDOR) 32 R/W 0000_0000h
47.2.1/
1182
400F_F0C4 Port Set Output Register (GPIOD_PSOR) 32
W
(always
reads
zero)
0000_0000h
47.2.2/
1182
400F_F0C8 Port Clear Output Register (GPIOD_PCOR) 32
W
(always
reads
zero)
0000_0000h
47.2.3/
1183
400F_F0CC Port Toggle Output Register (GPIOD_PTOR) 32
W
(always
reads
zero)
0000_0000h
47.2.4/
1183
400F_F0D0 Port Data Input Register (GPIOD_PDIR) 32 R 0000_0000h
47.2.5/
1184
400F_F0D4 Port Data Direction Register (GPIOD_PDDR) 32 R/W 0000_0000h
47.2.6/
1185
400F_F100 Port Data Output Register (GPIOE_PDOR) 32 R/W 0000_0000h
47.2.1/
1182
400F_F104 Port Set Output Register (GPIOE_PSOR) 32
W
(always
reads
zero)
0000_0000h
47.2.2/
1182
400F_F108 Port Clear Output Register (GPIOE_PCOR) 32
W
(always
reads
zero)
0000_0000h
47.2.3/
1183
400F_F10C Port Toggle Output Register (GPIOE_PTOR) 32
W
(always
reads
zero)
0000_0000h
47.2.4/
1183
400F_F110 Port Data Input Register (GPIOE_PDIR) 32 R 0000_0000h
47.2.5/
1184
400F_F114 Port Data Direction Register (GPIOE_PDDR) 32 R/W 0000_0000h
47.2.6/
1185
Chapter 47 General-Purpose Input/Output (GPIO)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 1181