Information

47.3.2 General-purpose output
The logic state of each pin can be controlled via the pin data output registers and port
data direction registers, provided the pin is configured for the GPIO function. The
following table depicts the conditions for a pin to be configured as input/output.
If Then
A pin is configured for the GPIO function and the
corresponding data output enable register bit is clear.
The pin is configured as an input.
A pin is configured for the GPIO function and the
corresponding pin data output enable register bit is set.
The pin is configured as an output and and the logic state of
the pin is equal to the corresponding pin data output register.
To facilitate efficient bit manipulation on the general-purpose outputs, pin data set, pin
data clear, and pin data toggle registers exist to allow one or more outputs within one port
to be set, cleared, or toggled from a single register write.
The corresponding Port Control and Interrupt module does not need to be enabled to
update the state of the pin output enable registers and pin data output registers including
the set/clear/toggle registers.
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
1186 Freescale Semiconductor, Inc.